This invention relates to microelectronic devices and fabrication methods therefor and, more particularly, to three-dimensional microelectronic devices and fabrication methods therefor.
Microelectronic devices are widely used in many consumer, commercial and other applications. As the integration density of microelectronic devices continues to increase, three-dimensional microelectronic devices may be fabricated, wherein active devices, such as transistors, are stacked on a microelectronic substrate, such as an integrated circuit substrate.
In particular, NAND flash memory devices are widely used for general storage and transfer of data in computers and other digital products. In NAND flash memory devices, a string of flash memory cells are connected in series. Moreover, in order to increase the integration density of NAND flash memory devices, three-dimensional or vertical NAND flash memory devices have been developed, wherein a string of serially connected flash memory cells is formed by the flash memory cells vertically being stacked on a face of a substrate, wherein a first flash memory cell in the string of serially connected flash memory cells is adjacent the face of the substrate and a last flash memory cell in the string of serially connected flash memory cells is remote from the face of the substrate. As used herein, and as conventionally used, the “vertical” direction is generally orthogonal to the face of the substrate, whereas the “horizontal” direction is generally parallel to (extending along) the face of the substrate. By vertically stacking the flash memory cells to form the string, increased integration density may be provided. These vertically stacked structures may also be referred to as “three-dimensional” flash memory devices.
Three-dimensional flash memory devices are described, for example, in U.S. Patent Application Publication No. 2008/0173928 to Arai et al., published Jul. 24, 2008; U.S. Patent Application Publication No. 2007/0252201 to Kito et al., published Nov. 1, 2007; U.S. Patent Application Publication No. 2007/0158736 to Arai et al., published Jul. 12, 2007; U.S. Patent Application Publication No. 2006/0186446 to Kim et al., published Aug. 24, 2006; U.S. Patent Application Publication No. 2005/0051806 to Masuoka et al., published Mar. 10, 2005; U.S. Pat. No. 6,933,556 to Endoh et al., issued Aug. 23, 2005; and U.S. Pat. No. 6,870,215 to Endoh et al, issued Mar. 22, 2005.